Optimization of initialization module of DNA sequence alignment accelerator / Zaharuddin Maksud

This report presents the development, implementation and optimization of the initialization module of the DNA sequence alignment accelerator. The scopes of this report is focus on the memory reduction and speed optimization on the initialization module using parallelism and divide and conquer methodologies. The development of the optimization using data compression technique is presented in this paper. In this project, the development target is Xilinx Spartan 3E FPGA using 50 MHz oscillator clock. The code is written in Verilog HDL using Xilinx ISE 10.1 and simulation test bench developed using Xilinx ISE 10.1 simulation tool. Theoretical analysis and simulation results have been compared in this paper.