Development and analysis of Si/SiGe based CMOS / Norulhuda Abd. Rasheid, Zaiton Sharif and Zuriati Janin

Complementary metal-oxide-semiconductor (CMOS) is currently the most dominant technology used in making integrated systems. It consists of both n-channel MOS transistor (NMOS) and p-channel MOS transistor (PMOS) fabricated on the same substrate. Conventionally, the substrate is made of silicon. Alternatively, the substrate can be made from different layer of semiconductors known as heterostructure. Much attention has been given to Si/SiGe due to its compatibility with silicon and higher carrier mobilities. SiGe is an alloy which is said to be an alternative solution to the problem of a down-scaled CMOS to produce high speed device. This work consists of modelling three different of Si/SiGe heterostructure substrates which are used to construct n- and p-channel MOSFETs and later to construct CMOS inverter. The three types of heterostructures are a strained SiGe on silicon substrate, a strained silicon on relaxed SiGe/Si substrate and a strained SiGe on strained Si/relaxed layers of SiGe/Si substrate. A device simulator, SILVACO TCAD Tools is used in this project. Although it has heterojunction capability, it does not support model for a strained Si. This work also highlights the method to simulate Si/SiGe heterostructures containing strained layer using SILVACO. Simulations on the band structure and current-voltage (I-V) characteristics of the MOSFETs are carried out. The Id-Vg and Ia-Va are simulated for different value of Ge% and mobility. This is to observe the effect of varying the value of Ge% and mobility used in the design. The simulation on the CMOS inverter as the fundamental circuit is carried out to obtain the transfer curve. The noise margin and switching characteristics can be extracted from the transfer curve. All the simulated results are then compared with the Si bulk. The analyses show that the performance of the Si/SiGe heterostructures is better in terms of the electrical characteristics of the MOSFETs and the switching characteristics of the CMOS inverter, as compared to the performance of the Si bulk.