Hole mobility enhancement of P-MOSFET using strained silicon, SiGe technology

In this project, the hole mobility enhancement of PMOS are studied using SiGe technology. Silicon Germanium (SiGe) are used to increase drive current or hole mobility in the drain and source region. The performance improvements of devices with a gate length of 0.9 µm, 0.8 µm and 0.7 µm were considered. The first part of this project is reviewed about the effect of using SiGe in PMOS process to calculate the mobility. 100% of mobility enhancement using SiGe was observed compared to conventional PMOS SiGe. The second part covers the characteristics for variation of SiGe thickness. Therefore, using SiGe is an efficient method for improving PMOS device performance.