Improvisation of Gabor filter design using verilog HDL

Mohamed, Shamsul Anuar (2009) Improvisation of Gabor filter design using verilog HDL. [Student Project] (Unpublished)

Abstract

This paper presents the improvisation of Gabor Filter design using Verilog HDL. This paper details important enhancement made to the Digital Gabor filter to minimize the sizing problem and the coding style that synthesizable. The intention is to study, analyze, simplify and improvise the design synthesis efficiency and accuracy while maintaining the same functionality. The main characteristic of the proposed approach was to replace the parallel multiplicationaccumulation unit (MAC) to a serial multiplication-accumulation unit where the convolution matrix takes place. This significant change helps to reduce the sizing problem without jeopardizing the functionality of the Digital Gabor Filter. The result provides area efficiency architecture for the effective design.

Metadata

Item Type: Student Project
Creators:
Creators
Email / ID Num.
Mohamed, Shamsul Anuar
2005387569
Contributors:
Contribution
Name
Email / ID Num.
Advisor
Md Idros, Mohd Faizul
UNSPECIFIED
Subjects: T Technology > TK Electrical engineering. Electronics. Nuclear engineering > Electronics > Apparatus and materials
T Technology > TK Electrical engineering. Electronics. Nuclear engineering > Electronics > Applications of electronics
Divisions: Universiti Teknologi MARA, Shah Alam > Faculty of Electrical Engineering
Programme: Bachelor of Electrical Engineering (Honours)
Keywords: Gabor filter design, Verilog HDL, Gate array, ASIC
Date: 2009
URI: https://ir.uitm.edu.my/id/eprint/121775
Edit Item
Edit Item

Download

[thumbnail of 121775.pdf] Text
121775.pdf

Download (282kB)

Digital Copy

Digital (fulltext) is available at:

Physical Copy

Physical status and holdings:
Item Status:

ID Number

121775

Indexing

Statistic

Statistic details