Abstract
This project is to perform phase shifting of sampled digitized frequency signal in WCDMA. Shifting of digital data is very important for ensure the translated data is shifted correctly into register without missing the data. The detail design of frequency translation will be focusing on the digital phase shifter where it is usually comprised in direct digital synthesizer (DDS) which then utilizes every digitized waveform signals stored in the register. The digitized signals will then shifted according to the designed algorithm so that every data will follows its sequence and shifted as desired. Algorithm of the design will be written in VHDL programming Language which then simulated through Modelsim SE 6.3f. In order to make sure the data is shifted accordingly, it can be seen by simulating the written program of its testbench by mapping the entire written block diagram based on the algorithm itself. Using XILINX ISE simulator will then synthesized the block diagram of the whole digital phase shifter design utilization.
Metadata
Item Type: | Student Project |
---|---|
Creators: | Creators Email / ID Num. Zakaria, Mohd Khalili UNSPECIFIED |
Contributors: | Contribution Name Email / ID Num. Advisor Khairuddin, Norhazlin UNSPECIFIED |
Subjects: | T Technology > TK Electrical engineering. Electronics. Nuclear engineering T Technology > TK Electrical engineering. Electronics. Nuclear engineering > Telecommunication T Technology > TK Electrical engineering. Electronics. Nuclear engineering > Telecommunication > Wireless communication systems. Mobile communication systems. Access control |
Divisions: | Universiti Teknologi MARA, Shah Alam > Faculty of Electrical Engineering |
Programme: | Bachelor of Electrical Engineering (Hons) |
Keywords: | Wideband code division multiple access (W-CDMA), Direct digital synthesizer (DDS), Register transfer level (RTL) |
Date: | 2009 |
URI: | https://ir.uitm.edu.my/id/eprint/121764 |
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