Implementing quantization in JPEG encoder using Xilinx FPGA technology / Mohd Zahid Idris

Compression of data in digital signal is a must in computer technology nowadays. Compression formats such as MPEG, JPEG, MP3 and others are widely used. Usually this compression codec are being developed using computer software and write using high level programming language such as C/C++. There are also some are being developed using RISC processor and instruction set suitable for data compression. In every format of compression data, Quantization is use as one of the main process in data compression including audio, image and video compression. The purpose of this project is to study the quantization process used in JPEG image compression and implement it on an FPGA by Xilinx. To implement quantization on an FPGA, VHDL language is used to program the behavioral logic design of quantization. Then the design is implemented on 2 Xilinx FPGA technology; Spartan and Virtex model to study the speed of processing and resource utilization on several chips on each model.