Translation buffer design project

Sulaiman, Sharifah Nor (2005) Translation buffer design project. [Student Project] (Unpublished)

Abstract

Translation buffers are used in common everyday applications to convert properties of different logic types to be compatible with other logic types. This project is to design a translation buffer using the CMOS process that allows a 100K ECL logic block to drive 1.5 CMOS chip. A common design tool Pspice was used to analyze the buffer to produce the required specification. The design translation buffer will be used to fit the schematic below containing the driver ECL and load CMOS.

Metadata

Item Type:	Student Project
Creators:	Creators Email / ID Num. Sulaiman, Sharifah Nor UNSPECIFIED
Contributors:	Contribution Name Email / ID Num. Advisor Sulaiman, Suhana UNSPECIFIED
Subjects:	T Technology > TK Electrical engineering. Electronics. Nuclear engineering T Technology > TK Electrical engineering. Electronics. Nuclear engineering > Electronics > Applications of electronics
Divisions:	Universiti Teknologi MARA, Shah Alam > Faculty of Electrical Engineering
Programme:	Bachelor of Electrical Engineering (Hons)
Keywords:	Translation buffer, Buffer amplitude levels, Translation buffer circuit
Date:	2005
URI:	https://ir.uitm.edu.my/id/eprint/115159