Multiplier integrated circuit design for digital neuron using 0.13μm technology / Ahmad Ridhuwan Sudin

Neural Network is artificial intelligence system that consists of multiplication and addition process. The Neuron Network is made from lot of multiplier and adder. The objective is to design an adder and multiplier integrated circuit for neuron architecture. Comparison is done between multiplier architectures, array and booth to neuron performance. The adder that is use in the design is ripple carry adder. For array multiplier, two structure of multiplier that was built 10x5 bit multiplier and 8x8bit multiplier. For Booth multiplier the multiplier is build using verilog code in Quartus software. After that ring structure of neuron was selected to be investigated the effect of the multiplier. The performances are evaluated in terms of number of bit, power, fan-out, and timing analysis. For the data, it was found that Booth multipliers are giving the less time delay, less power, less fan-out and also less logic element. Result shows that ripple carry adder and booth multiplier have almost same power, 196.9mW. For other performances booth is give less value, which is fan-out 467, logic element 103 and timing 19.984ns. For over all study show that booth multiplier performance is better than array multiplier