Abstract
The cascode LNA was designed for W-CDMA application. The LNA main function is to amplify extremely low signals without adding noise, thus preserving required signal to noise ratio of the system at extremely low power levels. The operating frequency for the design was at 2.14GHz with a supply voltage of 1.8V and implement on Silterra's 0.18-um. The objective the this project is define as to design an LNA with good noise and gain performances following the specifications set by the W-CDMA standard. It also to study a suitable topology for the LNA designs in a W-CDMA standard such as the inductively-degenerated cascode The transistor of LNA was design at 290pm using the power constrained optimization method. The type of simulation will be performed, which is distributed resistor and capacitors by the simulation using cadence design tools. The input resistor was 50Q matched using the transistor as well as the capacitor (mimcap) was also used to isolate VDD and ground. An inductor at the gate is acting as a 2.26nH as well as at drain and source is 7.66nH and 1.65nH. The plots of s-parameter, available gain and minimum noise figure simulation are describe detail in this paper. These paper are also analyzed extensively and justification for the error.
Metadata
Item Type: | Thesis (Degree) |
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Creators: | Creators Email / ID Num. Nordin, Norul Azirah UNSPECIFIED |
Contributors: | Contribution Name Email / ID Num. Thesis advisor Muhamad, Maizan UNSPECIFIED |
Subjects: | T Technology > TK Electrical engineering. Electronics. Nuclear engineering |
Divisions: | Universiti Teknologi MARA, Shah Alam > Faculty of Electrical Engineering |
Programme: | Bachelor of Electrical Engineering |
Keywords: | Low noise amplifier, flicker noise, scattering parameter |
Date: | 2009 |
URI: | https://ir.uitm.edu.my/id/eprint/98509 |
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