Implimenting Root Raised Cosine (RRC) filter for WCDMA / Nik Azman Nik Hassan

The aim of this project is to implementing Root Raised Cosine (RRC) filter for WCDMA on Field Programmable Logic Array (FPGA) using VHDL programming language. The RRC filter is used for both transmitter and receiver of 3G-WCDMA wireless communication but the area of interest is only on the transmitter side. The main objective of this filter is to reduced the inter-symbol interference (ISI), but it also can limit the bandwidth required for transmission and reduced Co-Channel interference. This digital filter is designed and simulated by generating filter coëfficiënt using Matlab 7.0. The designed filter is then verified in Matlab 7.0 to check its functionality that is to reduce the inter-symbol interference by placing the design filter in WCDMA Transmitter system SIMULINK. This experiment is conducted to check the functionality of the RRC Filter and to measured the channel bandwidth; 5MHZ for the WCDMA system. Finally, the RRC filter is generated into VHDL coding based on application Xilinx and being verified in ModelSim SE 6.3f before synthesized using Xilinx ISE Simulator. All the results were compared for verification.