Design of IEEE754 single precision FPU for statistical engine of DNA sequence alignment accelerator

This thesis presents the design of single precision IEEE754 floating point FPU that performs the arithmetic operation for statistical engine of DNA sequence alignment accelerator. The objective of this paper is to construct the arithmetic module for statistical engine of DNA sequence alignment accelerator. This paper is focusing on the single precision IEEE754 floating point arithmetic which is addition, subtraction, multiplication and division. All the arithmetic operation is combines together to create a floating point unit (FPU). The design is written in Verilog language and the tools used are Xilinx ISE 12.1 for coding and Isim 12.1 for the simulation. The module is successfully design and simulate. The design of the FPU follows the front-end-IC design flow which is at design and simulation level. At the end of the thesis, it can conclude that the design is successful and the objective of the thesis is successfully achieves.