Correlation study of double stack dielectric MOS capacitor simulation model with fabricated sample using TCAD SILVACO

Capacitance voltage measurements of MOS capacitor structure provide a wealth of information about the structure which is of direct interest when one evaluates an MOS process. This research paper discussed about the correlation study of simulation model for double stack dielectric MOS capacitor with the fabricated industry standard sample from wafer FAB. The SILVACO Athena and Atlas simulator software have been used for the analysis study. It should accurately describe and model the process parameters. This model could be used for process optimization in simulation mode then helps to reduce the process optimization time and the experiment cost which normally require many round of experiment in clean room. Capacitance model of MOS capacitor are directly related to its physical parameters. Therefore, the capacitance-voltage (C-V) characteristics of MOS capacitor were used as a diagnostic tool in this study to correlate the physical parameter and its capacitance value. Varying the dielectric thickness, dielectric permittivity and the size of MOS capacitor have been considered in the simulation to correlate the simulation output and measured value on the fabricated sample. A closed correlation between simulated and measured sample were published in this paper.