The development of high voltage DC converter using AMPWM switching pattern considering harmonics reduction / Khairul Safuan Muhammad

This thesis presents a development of high voltage dc converter using AMPWM switching pattern considering harmonics reduction. The digital controller is developed using Complex Programmable Logic Devices (CPLD). The proposed system utilizes a single-phase AC input supply. The power switching devices in the controlled bridge are controlled by the Alternate Multiple-pulse Pulse Width Modulation (AMPWM) switching pattern that will minimize the low order harmonics presence on the AC side of the converter. Five types of PWM patterns were analyzed and compared to determine the patterns that produce high voltage gain and good power quality aspect i.e. less low order harmonic in the input supply current using PSpice. From the simulation results obtained, the best switching pattern is selected and implemented in the Xilinx Complex Programmable Logic Devices (CPLD) chip. A high frequency transformer with 1:1 ratio is used in the design to provide galvanic isolation for better circuit performance and protection. The optimum operation of transformer core in four quadrant of B-H curve is also considered in the proposed converter topology. A laboratory prototype of the converter has been developed and tested. Experimental results were compared with respect to the simulation results to illustrate the effectiveness of the proposed technique.