Abstract
The following report presents the performance analysis of wideband low noise amplifier (LNA) design circuits utilizing 0.18]uin CMOS technology. The objective of this performed analysis of a LNA design that need achieve sufficiently large gain and low noise figure, compare the design with other design, and to verify the effect of parameter Rr and Ls to S-parameter. This LNA design was expected to achieve a peak power gain of 13.8 dB. Within the 3 dB bandwidth from 2.6 GHz to 6.6 GHz, the noise figure (NF) is in a range of 4.0 dB to 6.5 dB and the input reflection coefficient, Sn is below -13.0dB.The standard specification for LNA with bandwidth from 2.6GHz is ISDB. This usually used for digital audio and video broadcasting application. By using Cadence Virtuoso as an EDA tool as a simulation tool, the result are obtained. The simulation result had almost achieved the target and this analysis had performed successfully simulation.
Metadata
Item Type: | Thesis (Degree) |
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Creators: | Creators Email / ID Num. Nordin, Nor Aida 2007270672 |
Contributors: | Contribution Name Email / ID Num. Advisor Mohamad, Maizan UNSPECIFIED |
Subjects: | Q Science > QC Physics > Electricity and magnetism > Electricity > Electric discharge T Technology > TK Electrical engineering. Electronics. Nuclear engineering > Electronics |
Divisions: | Universiti Teknologi MARA, Shah Alam > Faculty of Electrical Engineering |
Programme: | Bachelor of Electrical Engineering (Honours) |
Keywords: | CMOS, electrostatic discharge (ESD), low noise amplifier (LNA), wideband |
Date: | 2010 |
URI: | https://ir.uitm.edu.my/id/eprint/102745 |
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