A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail

Abdul Rahim, Siti Khatijah Nor and Ismail, Siti Rozanae (2006) A parallel version of a binary method and vector addition chains precomputation for exponentiation in RSA / Siti Khatijah Nor Abdul Rahim and Siti Rozanae Ismail. [Research Reports] (Unpublished)

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Abstract

Exponentiation is a fundamental operation that exists in most computational number theory. It is one of the dominant parts of algorithms for key exchange, electronic signatures and authentication in cryptography. Encryption and decryption in RSA is achieved through exponentiation. There are various approaches to achieve exponentiation. One of those is the Binary Method. In this project, we implemented a parallel version of this Binary Method. Exponentiation can be time consuming; however it depends on the algorithms and the implementation used. Precomputing some of the powers is an option to speed up exponentiation which can save time too. However, we also constructed an algorithm for a parallel version of Vector Addition Chains to enhance the performance. Prior to that, a study on the existing sequential version was conducted and analyzed. It has been proven that a significant speedup were achieved using this new approach.

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Item Type: Research Reports
Creators:
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Abdul Rahim, Siti Khatijah Nor
UNSPECIFIED
Ismail, Siti Rozanae
UNSPECIFIED
Subjects: Q Science > QA Mathematics > Instruments and machines > Electronic Computers. Computer Science
Q Science > QA Mathematics > Instruments and machines > Electronic Computers. Computer Science > Programming. Rule-based programming. Backtrack programming
Divisions: Universiti Teknologi MARA, Shah Alam > Research Management Centre (RMC) > Institute of Research, Development and Commercialization (IRDC)
Item ID: 47992
Uncontrolled Keywords: RSA, Cryptography, Encryption, Exponentiation, Binary Method
URI: https://ir.uitm.edu.my/id/eprint/47992

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