Implementation of VLSI architecture in linear prediction algorithm / Mohd Saiful Mistor

This project presents the implementation of VLSI architecture in linear prediction algorithm. The system is designed to monitor the condition base of engine oil and predict the lifetime of the sample of engine oil. The design used for this system is Verilog language. The design is implemented in FPGA board to show the value of slope. This project covered the designing of the Prediction Algorithm where it monitors the degradation of engine oil for real time. The lifetime of engine oil can be predicted based on the value of slope. Synthesis and simulation is done using Xilinx ISE software to obtain the RTL schematic as well as the waveform of the module.